The thermal engineering of a semiconductor memory device (chip) is an indispensable technique for accurately operating internal circuits. Especially in recent years, operation errors and device destruction caused by heat generated in three-dimensional multilayered memories such as a ReRAM (Resistive Random Access Memory), MRAM (Magnetic Random Access Memory), and BiCS (Bit Cost Scalable)-NAND pose problems.
Unfortunately, the conventional thermal engineering is to estimate a maximum temperature that can be generated in a semiconductor memory device being designed, based on the gross power consumption of the semiconductor memory device, and design circuits so that the maximum temperature does not exceed a tolerance. Since this method cannot design circuits by taking account of a local temperature distribution when a semiconductor memory device is actually operating, the method is insufficient as the thermal engineering of semiconductor memory devices.